NXP WiFi Baseband 招Digital Design Engineer 直推manager

NXP WiFi Baseband 组急招几名有经验的Digital IC Design Engineer (3年+ 不限）（NCG有兴趣的话也可以发我 我发给我manager看看 是有summer intern的位置的）
Base在南湾 North San Jose，组内大多是华人，气氛非常好，老板很和蔼。平时工作大多可以用中文交流（应该是个加分项吧）
有兴趣的可以发我resume到 1point3acres.com

Job:
Qualifications:
- MSEE with 3+ years communications/DSP IC experience
- Understanding ASIC design flow
- Good Understanding of DSP and communications algorithms, and DSP system design specification
- Experience in micro-architecture design, RTL coding, and functional verification
- Proficient in design and verification tools
- Good understanding of synchronous/asynchronous design, and timing requirements for complex DSP modules
- Ability of power/area trade-off analysis
- Experience in chip bring up and validation
- Experience in system Verilog is a plus
Familiar with the following common digital design tools:
- Verilog design tools (Synopsys VCS, Verdi or similar)
- Synthesis tools (Synopsys Design Compiler)
- Lint, CDC tools (Synopsys Spyglass or similar)
- Static Timing Analysis tools (Synopsys PrimeTime)
- Power estimation tools (Synopsys PTPX, Spyglass, Cadence Joule or similar)
- Hardware validation tool (Palladium, FPGA etc.)
- Handy with common scripts (shell, Perl etc.)
- Handy with laboratory debug tools on chip support (Logic Analyzer, Oscilloscope)

十分感谢！